module  mfsm( clk, a, rst, y);

input  clk, a, rst;
output y;

reg    cs, ns;
reg    y;

parameter s0 = 1'b0, s1=1'b1;

always @ ( posedge clk or posedge rst)
begin
  if(rst ) 
       cs <= s0;
  else  
       cs <= ns;
end

always @( cs or a)
begin
   case(cs)
   s0:   if(a)  ns = s1;
         else   ns = s0;

   s1:   if(a)  ns = s1;
         else   ns = s0;

   default: ns = s0;
  
   endcase
end

always @( cs )
begin
   case(cs)
   s0:   y = 0;

   s1:   y = 1;

   default: y  = 0;
  
   endcase
end



endmodule